Bangalore, June 15, 2010 â€â€ Magma® Design Automation (Nasdaq: LAVA), GLOBALFOUNDRIES and Virage Logic (Nasdaq:VIRL), today announced the availability of a proven, Unified Power Format (UPF)-compliant RTL-to-GDSII reference flow. This automated, comprehensive solution streamlines the design and manufacture of ICs that incorporate Virage Logicâ€â„¢s intellectual property (IP) and are manufactured in GLOBALFOUNDRIESâ€â„¢ 65LPe 65-nanometer (nm) low-power process technology.

This integrated RTL-to-GDSII reference flow is based on Talus® 1.1, the current release of Magmaâ€â„¢s IC implementation system, and leverages Talus Design for synthesis, Talus Vortex for physical design and Talus Power Pro for power optimization. The reference flow supports power intent through the UPF standard, incorporating multiple voltage domains, retention cell management, insertion of automatic level shifters and isolation cells, power switches, well tap cells and on-chip variation. Talus 1.1 also supports the CPF standard for power intent.

To validate the flow, a reference design incorporating Virage Logic SiWare standard-cell and SiWare memory IP was implemented in the Talus system using a UPF-compliant low-power design intent specification. The reference design met GLOBALFOUNDRIESâ€â„¢ technical specifications including all low-power requirements.

"Creating a comprehensive low-power flow that delivers good performance is a challenging task," said Premal Buch, general manager of Magmaâ€â„¢s Design Implementation Business Unit. "The Magma-GLOBALFOUNDRIES-Virage Logic collaboration will help designers address these challenges by enabling them to quickly implement their low-power designs within Magmaâ€â„¢s Talus flow and take advantage of the low-power performance of the GLOBALFOUNDRIES 65LPe process.”

"Our customers not only need advanced low-power solutions, they need to hit their critical market windows on time with reliable predictability,” said Walter Ng, vice president, IP Ecosystem at GLOBALFOUNDRIES. "The reference low-power design implemented with Magmaâ€â„¢s Talus system and the Virage Logic library enables our customers to quickly take full advantage of GLOBALFOUNDRIES proven 65LPe process."

â€Å“Our mutual customers are increasingly being driven to reduce both dynamic and standby power consumption,” said Brani Buric, executive vice president of Marketing and Sales of Virage Logic. â€Å“This new Magma-GLOBALFOUNDRIES-Virage Logic 65LPe reference design flow enables them to use the UPF standard along with our SiWareTM Memory and SiWareTM Logic to meet their low-power design requirements.”

Availability
SiWare Memory compilers and SiWare Logic libraries enable SoC designers to optimize for power, performance, area and yield and are available to customers for the GLOBALFOUNDRIES 65LPe process through Virage Logicâ€â„¢s foundry sponsored IP program. The reference flow is available from Magma, GLOBALFOUNDRIES and Virage Logic upon request.

Magma will demonstrate its entire line of chip design software in booth 602 at the 47th Design Automation Conference (DAC) June 14-16 at the Anaheim Convention Center in Anaheim. For more information on Magmaâ€â„¢s activities at DAC, visit www.magma-da.com/DAC2010.

About Magma
Magmaâ€â„¢s electronic design automation (EDA) software provides the â€Å“Fastest Path to Silicon”â„¢ and enables the worldâ€â„¢s top chip companies to create high-performance integrated circuits (ICs) for cellular telephones, electronic games, WiFi, MP3 players, digital video, networking and other electronic applications. Magma products are used in IC implementation, analog/mixed-signal design, analysis, physical verification, circuit simulation and characterization. The company maintains headquarters in San Jose, Calif., and offices throughout North America, Europe, Japan, Asia and India. Magmaâ€â„¢s stock trades on Nasdaq under the ticker symbol LAVA. Follow Magma on Twitter at www.Twitter.com/MagmaEDA and on Facebook at www.Facebook.com/Magma. Visit Magma Design Automation on the Web at www.magma-da.com.

About GLOBALFOUNDRIES
GLOBALFOUNDRIES is the world's first full-service semiconductor foundry with a truly global manufacturing and technology footprint. Launched in March 2009 through a partnership between AMD [NYSE: AMD] and the Advanced Technology Investment Company (ATIC), GLOBALFOUNDRIES provides a unique combination of advanced technology, manufacturing excellence and global operations. With the integration of Chartered in January 2010, GLOBALFOUNDRIES significantly expanded its capacity and ability to provide best-in-class foundry services from mainstream to the leading edge.

GLOBALFOUNDRIES is headquartered in Silicon Valley with manufacturing operations in Singapore, Germany, and a new leading-edge fab under construction in Saratoga County, New York. These sites are

supported by a global network of R&D, design enablement, and customer support in Singapore, China, Taiwan, Japan, the United States, Germany, and the United Kingdom. For more information on GLOBALFOUNDRIES, visit http://www.globalfoundries.com.

About Virage Logic
Virage Logic is a leading provider of semiconductor intellectual property (IP) for the design of complex integrated circuits. The company's highly differentiated product portfolio includes processor solutions, interface IP solutions, embedded SRAMs and NVMs, embedded test and yield optimization solutions, logic libraries, and memory development software. As the semiconductor industry's trusted IP partner, more than 400 foundry, IDM and fabless customers rely on Virage Logic to achieve higher performance, lower power, higher density and optimal yield, as well as shorten time-to-market and time-to-volume. For further information, visit http://www.viragelogic.com.